Research Seminars

System and Processor Architecture Design for Multimedia Applications
Dr. Eric Debes, Architecture Research Lab, Intel Labs, Santa Clara, California
Thursday 18 December 2003

This seminar will address the issue of system and processor architecture design for emerging multimedia applications, as well as software solutions to efficiently exploit new hardware features. We will start with a characterization of emerging multimedia workloads. Then we will show how processor architecture has evolved to address the specific requirements of such applications. Finally we will describe the software solutions Intel delivers to efficiently take advantage of new hardware capabilities on a wide range of architectures, from low-power XScale/PCA based devices to high performance Pentium 4 and Itanium Processor Family processors.

Biography

Eric Debes received M.S. in Electrical and Computer Engineering from Supélec, France in 1996, a M.S. in Electrical Engineering from the Technical University Darmstadt, Germany in 1997 and a PhD from the Swiss Federal Institute of Technology (EPFL) in 2000. From 1997 to 2001 he worked in a partnership between EPFL and Hewlett Packard on processor and system architecture for multimedia applications. Since 2001 he has been a researcher in the Architecture Research Lab of the System Technology Labs at Intel Corporation, Santa Clara, CA. Eric’s research interests include image and video coding and processing algorithms as well as computer architecture and parallelism. He is a member of the IEEE, ACM and SPIE.